FMC Host Digital IO Device#

Authors:

Jonathan P. Newman

Version:

1

IO:

Frame Source, Frame Sink, Register Access

ONIX ID:

18

ONIX Hubs:

PCIe Host

Description#

The FMC Host Digital IO device sends and receives digital data to and from Breakout Board and allows control over its display state. This includes:

  • 8x 5-volt tolerate digital inputs sampled at 10 MHz

  • 8x digital outputs sampled at 10 MHz

  • HARP bus controller

  • 6x user buttons

  • LED brightness and on/off state

Digital communication with the Breakout Board occurs using a simple serialization protocol.

Breakout to Host Serialization#

The breakout to host serialization protocol is as follows:


Buttons

Buttons press state. Each bit represents the press state of a single button in the 6-buttons bank.

  • 0: Up

  • 1: Down

Digital In

Digital input port. Each bit represents state of a signal line in the 8-bit port.

  • 0: Low

  • 1: High

Pnn

Headstage port power state. Each bit represents the power state of one of the four headstage ports.

  • 0: Power off

  • 1: Power on

A clock recovery circuit is required at the receiver to generate clk from sclk in order to sample the dat lines.

Host to Breakout Serialization#

The host to breakout serialization protocol is as follows:


CMD

Two bit command word that determines what to do with SW.

  • 0b00: Shift slow bits into slow shift register

  • 0b01: Validate and move slow shift register to outputs and set initial state to [0, …, 0, slow1, slow0]. slow1 should be the desired MSB at next command.

  • 0b10: Reserved, same as 0b00 currently. Don’t use.

  • 0b11: Reset

SW

Two-bit “slow-word” part. These bits are accumulated over time in order to control the display state and non-timing critical apsects of the breakout board. For instance, LED colors and brightness, headstage lock state, etc. As of this writing, for Breakout Board, a complete slow-word is as follows.

which are defined as follows:

  • Acq. Running: Host hardware run state. 0 = not running, 1 = running

  • Acq. Reset Done: Host reset state. 0 = reset not complete, 1 = reset complete

  • Reserved: NA

  • LED Level: 4 bit register for general LED brighness. 0 = dimmest, 16 = brightest

  • LED Mode: 2 bit register for LED mode. 0 = all off, 1 = only power/running, 2 = power/running, pll, harp, 3 = all on

  • Port X Status: 2 bit register describing the headstage port state. 00: power off, 01: power on, 10: locked, 11: device map good.

  • Analog IO Dir.: 12 bit register describing the direcitonality of each of the analog inputs. 0 = input, 1 = output.

  • HARP Config.: 2 bit register for possible future harp configuration.

  • GPIO Dir.: 16 bit register for possible future digital io directionality configuration.

Digital Out

Digital output port state. Each bit represents state of an output signal line in the 8-bit port.

  • 0: Low

  • 1: High

A clock recovery circuit is required at the receiver to generate clk from sclk in order to sample the dat line.

Register Programming#

Address

Name

Access

Time of Effect

POR Value

Reset Action

Description

0x00

ENABLE

R/W

On Reset

Implementation dependent, see hub documentation

None

The LSB is used to enable or disable the device data stream:

  • 0x0: data output disabled

  • 0x1: data output enabled

0x01

LEDMODE

R/W

Immediate

0x0003

None

The two LSBs determine the breakout board’s LED display mode:

  • 0b00: All off

  • 0b01: Power/running only

  • 0b10: Power, running, HARP, and Lock

  • 0b11: Normal

0x02

LEDLVL

R/W

On Reset

0x0007

None

The four LSBs dertermine the overall LED brightness. Brightness increases linearly with this register’s 0-15 value.

0x03

HARPCONF

R/W

On Reset

0x0000

None

HARP Bus configuration. Reserved for future use.

0x04

GPIODIR

R/W

On Reset

0x0000

None

GPIO configuraiton. Reserved for future use.

Device To Host Data Frames#

Each frame transmitted to the host consists of a single data specifying the current digital input and user input state.

Note

Input frames are only transmitted if there is a change in digital input or user input state.


Input Port State

8-bit input port state

Link State

On/off state of each headstage link.

Button State

Press state of each button.

Host To Device Data Frames#

Each frame sent to the device contains an 8-bit word specifying the digital output port state:


Output Port State

8-bit output port state